I've got a question about the Design compiler's constraints. Especially, set_false_path Vs. set_clock_group.
As I know,
- set_false_path
(a) set_false_path -from [get_clocks CLKA] -to [get_clocks CLKB]].
I think this is considering about one way direction.
(b) set_false_path -from [get_clocks CLKA] -to [get_clocks CLKB]]
set_false_path -from [get_clocks CLKB] -to [get_clocks CLKA]]
-> CLKA -> CLKB, CLKB -> CLKA (Bi-Direction)
- set_clock_groups
(a) set_clock_groups -asynchronous -group CLKA -group CLKB
I think this is considering about Bi-direction.
So here is my question I think there is only difference between set_false_path and set_clock_group is only direction.
Then I think 1.(b) and 2.(a) are the same. so then can I use 2.(a) instead 1.(b)?
2 Answers
In some cases (like 1b and 2a) both commands have the same results, so the user can prefer any of them. But there are also some differences for some cases.
set_false_path allows to remove specific constraints between clocks. For example, I can remove setup checks while keeping hold checks. Or I can select only one edge (rise or fall) of the clock(s). This command has more options shortly.
set_false_path -rise_from CLKA -fall_to CLKB -setupThe advantage of set_clock_groups is simple. It saves us from defining too many false paths. That's why 2a is better than 1b. If we have more clocks, it will help much more.
set_clock_groups -asynchronous -group CLKA -group CLKB -group CLKC Note that set_false_path has the highest precedence in SDC files, so it trumps all other constraints. Whereas set_clock_groups can be overridden if you, for example, want to constrain a sampled clock domain crossing (e.g. CDC FIFO Gray code crossing).